The Dauug House Wright State University logo
Dauug|36 minicomputer documentation

Simulation instructions

Opcode P/U Category Description
MEMSET user simulation paravirtualized primary storage fill
PVIO user simulation Paravirtualized input and output

The PVIO instruction accesses a tiny I/O subsystem that the electrical simulation provides. PVIO has no effect on physical Dauug|36 systems.

Because Dauug|36 does not yet offer an I/O subsystem (as of 7 July 2023), the electrical simulation offers a paravirtualized (simulated) I/O subsystem for testing programs that would ordinarily have I/O. This is particularly valuable for testing operating systems and portions of Dauug|36’s I/O subsystem as they are designed and implemented. The paravirtualized I/O is principally a filesystem, but also includes a real-time clock and a method for the superuser to cause the simulator to sleep.

Because this simulated I/O is intended as a temporary aid, its features are limited, its simulated electrical interface is modest, and its method of programming reflects these scope limitations.

This article is about how the PVIO instruction is implemented and how it works. For practical information about using PVIO, see the paravirtualized I/O code examples.

MEMSET Paravirtualized primary storage fill

MEMSET’s documentation is missing and belongs here. This instruction exists in the electrical simulation only. Its purpose is to speed loops that zero memory. For example, zeroing a 4096-word page takes more than 30 seconds to simulate, but MEMSET can do it in a moment by indicating the lower and upper address for a block fill. Osmin supports MEMSET as an option for simulation; see the source code in os.a for several examples.

PVIO Paravirtualized input and output

Syntax
dest = data pvio command
Available commands
now = 0 pvio clock`t
ignore = filename pvio close`t
ignore = word pvio dec`t
ignore = filename pvio demux`t
ignore = word pvio hex`t
len = filename pvio in8`t
len = filename pvio in36`t
len = filename pvio len8`t
len = filename pvio len36`t
ignore = duration pvio nsleep`t
ignore = word pvio oct`t
ignore = filename pvio out8`t
ignore = filename pvio out36`t
word = filename pvio read`t
ignore = word pvio sdec`t
ignore = word pvio seteof`t
ignore = word pvio setidl`t
ignore = word pvio tet`t
ignore = filename pvio unlink`t
ignore = word pvio write`t
Register Signedness
All ignored
1 opcode only
No flags changed

The PVIO (paravirtualized input/output) instruction causes the control decoder to load a 1 into one-bit flip-flop ff pvio. Hooks in c_1g74.c, c_sram.c, and additional module pvio.c use the state of ff pvio to implement a paravirtualized I/O subsystem that is mapped over register file SRAMs L and R.

PVIO will not work unless the .ns script informs L, R, and ff pvio of their role via tweak directives. These should look like:

tweak ffpvio pvio
tweak L pvio
tweak R pvio=/home/me/cpu/code/netsim/pvio-files
notrace heartbeat ; optional, to suppress CPU click trace messages

Note the asymmetry between the L and R tweaks, and that the latter has to contain a path to an existing directory for the simulated files to live.

There is a single namespace for files, specifically the 36-bit integers, and there is no concept of directories or permissions within the simulated I/O subsystem. The corresponding files on the host are given tetrasexagesimal names with prefix file-; this prefix is to keep programs like ls from hiding filenames like ......, which are legal within this filesystem. Here’s a screenshot from my machine containing examples of these names:

me@host:~/cpu/code/netsim$ ls pvio-files/
file-000001  file-000002  file-000pts  file-00copy  file-0hello  file-unlink

In this example, I manually added file-000pts as a symlink to /dev/pts/0. This file can be opened twice (one open to read, and another open to write) to allow a program to talk to a terminal window on the simulator host.

Because PVIO directly examines its left and right operands as they come from the register file, and then directly overwrites the left and right copies of the destination register, the arithmetic logic unit (ALU) is completely bypassed by this instruction. This means that no flags can be altered by PVIO, although there are use cases where flag updates would be helpful.

The following commands are supported within the I/O subsystem:

Command Action
clock`t read the time and date (whole seconds since Epoch)
close`t unmap register (closes file)
dec`t write an unsigned decimal value as ASCII bytes
demux`t specify file to write to, if more than one is open
hex`t write a hexadecimal value as ASCII bytes
in8`t map register to read bytes from file
in36`t map register to read 36-bit words from file
len8`t get length of file in bytes
len36`t get length of file in 36-bit words
nsleep`t superuser only: have simulator sleep for some time
oct`t write an octal value as ASCII bytes
out8`t map register to write bytes to file
out36`t map register to write 36-bit words to file
read`t read a byte or 36-bit word
sdec`t write a signed decimal value as ASCII bytes
seteof`t specify value returned if a read passes end of file
setidl`t specify value returned if a read would block
tet`t write a tetrasexagesimal value as ASCII bytes
unlink`t deletes a file from the filesystem
write`t write a byte or 36-bit word

Usage examples

Paravirtualized I/O sample code is available for all of the above commands.

Word file format

The electrical simulation runs on an x86 host where files are treated as byte vectors. But the I/O subsystem needs to treat some of these files as 36-bit word vectors. What happens is that 36-bit words are left-zero-extended to 40-bit words, then written as five bytes with the most significant byte. So the word

1010_00000011_11111100_11000000_00111111`b

will be stored as the byte sequence

00001010`b 00000011`b 11111100`b 11000000`b 00111111`b

Word files are read by treating every five-byte group as a 40-bit quantity with the most significant byte first, and discarding the four most significant bits to obtain a 36-bit word.


Marc W. Abel
Computer Science and Engineering
College of Engineering and Computer Science
marc.abel@wright.edu
Without secure hardware, there is no secure software.
937-775-3016